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Thread: AMD Piledriver to launch in Q3 2012!

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    Default AMD Piledriver to launch in Q3 2012!


    Sticking with AM3+ socket

    If all goes well and AMD doesnít hit any delays, the Bulldozer successor codenamed Vishera could launch in Q3 2012. This is the timeframe that AMD is disclosing to its partners and letís hopes that it can stick with this schedule.


    One of the possible issues is that engineering samples are planned only for Q2 2012 and usually AMD provides them to platform manufactures at least two quarters before the planned launch. This can mean that AMD is launching Piledriver cores and Vishera in very late Q3 2012 which kind of makes sense.


    Despite the fact that AMD already told its partners that Vishera powered Volan platform is coming in 2012, many are preparing to launch of Bulldozer desktop successors in early 2013. They learned the lesson with Bulldozer that was delayed for many quarters; letís not say years. It is better be skeptical than sorry.


    Volan uses the same AM3+ socket and will use well know AMD 990FX northbridge and SB950 southbridge, the same chipset that you see today with Bulldozer FX processors.


    Of course Vishera CPU is competing against Ivy Bridge CPUs and alternatively Ivy Bridge E high end parts, both 22nm. Ivy Bridge quad and dual parts will launch in early Q2 2012, most likely April / May while Ivy Bridge E, 22nm quad and hexa-cores should launch in late Q3 or early Q4 2012 and put a lot of pressure on Volan platform.


    Still AMD will have the price advantage and will in any case end up significantly cheaper compared to Intelís solution in the same high end Ė enthusiast desktop market segment. It always had the advantage and it always will.

    http://www.fudzilla.com/processors/i...nch-in-q3-2012

    ---------- Post added at 15:44 ---------- Previous post was at 15:40 ----------


    lol video, must watch!

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    Haha, the video is sure something. I hope PileDriver won't disappoint, the least it's good to know my board supports it officially. ^_^

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    Vishera(Late Piledriver) will have
    • Up to 10 cores aka up to 5 compute nodes
    • Four independent 64-bit DDR3 channels(Quad-channel)
    • Support for FMA, F16C, BMI and TBM instruction sets
    • AGLUs can do some ALU functions so Vishera will have 4 ALU IPC in some cases


    http://support.amd.com/us...4_15h_sw_opt_guide.pdf
    Search 20h or 2Fh

    Use F16c instructions where applicable on AMD Family 15h (models 10h+) processors to convert
    floating point values between 32-bit single precision and 16-bit half precision formats.

    Use bit manipulation (BMI) and trailing bit manipulation instructions (TBM) where applicable to
    simplify bit manipulation operations.
    You know what FMA3/FMA4 is

    They also go into how scheduling should work as well

    You have Core0-Core1, Core2-Core3, Core4-Core5, Core6-Core7, Core8-Core9*

    Independent Data Threads should be scheduled like
    Core 0, Core 2, Core 4, Core 6, Core 8* then Core 1, Core 3, Core 5, Core 7, Core 9*

    Shared Data Threads should be scheduled like
    Core 0, Core 1, Core 2, Core 3, Core 4, Core 5, Core 6, Core 7, Core 8*, Core 9*

    *Vishera



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    suddenly AMD is on fire

    @ CES they introduced AMD lightbolt ,trinity APUs new gens are awesome and apple is likely to use them in their MACS
    then success of radeon HD7000 and HD 8000 already in rumours

    so i dont think AMD want to destroy this good flow by bringing a slouch to the market....hoping good for pilediver

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    ^please don't hope anything. Then again it will bulllldoze ur hope.

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    Features of AMD Piledriver processors


    A few days ago AMD posted new technical document, titled Software Optimization Guide for AMD Family 15h Processors (PDF file). Although the guide is intended for developers, it includes some useful information about AMD Family 15h, i.e. Bulldozer. The document not only describes features of current Bulldozer processors, which have model numbers 00h - 0fh (0xh), but also refers to two future generations with model numbers 10h - 1fh (1xh), and 20h - 2fh (2xh). We believe that microprocessors with 10h and higher model numbers will be based on Piledriver cores.


    The optimization guide is quite large. References to different features are scattered across the document, so we did our best to find all relevant information. There will be some features, applicable to both 1xh and 2xh CPUs, such as support for 16-bit floating point numbers, and addition of VCVTPH2PS and VCVTPS2PH instructions, used to convert to and from new 16-bit floating-point type. The processors will also incorporate FMA3, Bit Manipulation Instructions (BMI) and Trailing Bit Manipulation instructions, or TBM. In addition to this, there will be some other improvements, such as increased depth of FP load queue, and larger size of level 1 data TLB. Also, latencies of some instructions were reduced.


    Microprocessors with model 1xh will have up to 2 modules, or 4 cores, and will lack L3 cache. These characteristics match upcoming Trinity core, that will be utilized by mobile AMD chips. Model 1xh CPUs will also have enhanced IOMMU, or IOMMU v2, that will improve access of I/O devices to system memory, and will add such features as direct access to user I/O space, and interrupt remapping and filtering.


    Processors with model number 2xh will have up to 5 modules, or up 10 cores, and support quad-channel DDR3 memory. Like Bulldozer CPUs, which are aimed at both desktop and server markets, 2xh may also target both markets. We suspect that 2xh parts will be released as "Vishera" CPUs on desktop, and "Terramar" and "Sepang" processors for servers. It is possible that server Terramar Opterons, that will integrate two dies on a chip and have up to 20 cores, will support 8 memory channels.


    The optimization guide also mentions model 30h - 3fh, and 40h - 4fh processors, however it doesn't contain any details on these chips. The summary of all features, referenced by the optimization guide, is provided below:



    Core Zambezi /
    Interlagos /
    Valencia
    Trinity Vishera /
    Terramar /
    Sepang
    L3 cache Present None Present
    16-bit floating point type Not supported Supported Supported
    F16C (VCVTPH2PS and VCVTPS2PH) Not supported Supported Supported
    FMA3 Not supported Supported Supported
    BMI instructions Not supported Supported Supported
    TBM instructions Not supported Supported Supported
    Size of L1 data TLB 32 entries 64 entries 64 entries
    Max number of cores 8 4 10
    DDR3 channels 2 2 4
    Depth of FPU load queue 40 44 44
    HyperTransport Assist feature Supported Not supported Supported
    IOMMU v1 v2 not specified


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    Not much hopes up for AMD processors. Intel will come up with something better, they always do.

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    Quote Originally Posted by Mohiuddin View Post
    ^please don't hope anything. Then again it will bulllldoze ur hope.
    No, this time we can actually hope something good. IIRC AMD is ditching GloFo and switching back to TSMC for these Piledriver chips, if memory serves me right the real problems with BD is the high cache latencies & the small front end killing performance. Multithreaded applications would've favored more with the sharing of floating point & cache but the huge 2MB of L2 cache (slow) rendered it unusable.

    BD architecture is revolutionary, but being made on a completely untested node or was it more likely a design flaw, one thing for sure is that GloFo couldn't handle the process correctly ultimately hurting yields which is a very important factor when producing chips. The radically advanced design of these module chips was also 20% bigger while being 20% slower cuz of the automated vs hand crafted parts, which was explained by an AMD rep himself.

    There's a lot to fix in BD's design, if AMD are able to fix these initial problems & tweak the original design futhrer, I'm fairly sure we'll see a better chip in the future.
    Last edited by dipanzan; January 17th, 2012 at 19:09.

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    AMD Trinity to be available mid-2012

    Computerbase.de have published some slides that AMD revealed at CES, providing an overview of the upcoming Trinity APUs. With a look at some of the features that will be available, and some performance expectations, there are also details of a 17W low power version that targets "ultrathin" notebooks, AMD's answer to Intel's "Ultrabook" devices.

    With the addition of the previously unknown 17W version, Trinity will offer three classes of APU. For the desktop market, there will be models with TDP ranging from 65W to 100W. Mainstream notebook APUs will have a TDP of 35W to 45W, and the ULV parts will have a TDP of 17W.

    Trinity will have a "Piledriver" CPU core (the successor to "Bulldozer"), and is expected to have HD 6000 series graphics (although the latter has not yet been confirmed). The projected performance gains over Llano for desktop SKUs indicate up to 30% boost in processor performance, and about 30% improvement in graphics performance. For mainstream notebook devices, those figures change to 25% and 50%. Notebook benchmarks were measured using PC Mark Vantage Productivity preset for the CPU, and 3D Mark Vantage Performance preset for the GPU.

    Trinity also brings new video capabilities, which may include Video Compression Engine (VCE) to compete with Intel's QuickSync. It is also optimized for use with Windows 8, and introduces Turbo Core 3.0. The projected battery life when idle (on the Windows desktop) is 12 hours, and when running 3D Mark 06 it is claimed to be 3 hours 20 minutes.

    The ULV models, made possible by the improved power efficiency, make thinner products a possibility, enabling AMD to enter the ultrathin notebook market. AMD aims to push it's ultrathin notebooks into mainstream markets by offering competitive pricing. One of it's selling points is the availability of quad-core ULV SKUs, something Intel are not currently offering. Also, the 17W models are expected to provide similar performance to 35W Llano models.

    Trinity is expected to be available sometime in the middle of the 2012, in direct competition with Intel's Ivy Bridge. Figures indicate that Intel will maintain the lead in CPU performance, while AMD will maintain a lead in integrated GPU performance.

    http://www.cpu-world.com/news_2012/2..._mid-2012.html

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